Job description:
-Responsible fpackage development work risk management by simulation.
-Responsible fevaluation of OSAT process capability, chip packaging size, etc.
-Work with backend team OSAT to finish design including packaging floplan POD, connection bump bump pattern, packaging process flow material, packaging technical risk assessment reliability design.
-Work with OSAT to do DFM review, lead OSAT to finish process TD, NPI, evaluation of process quality, yield risk, lead OSAT to continuously improve packaging yield product reliability performance.
Qualifications:
-With Three years work experience with master degree majin Microelectronics, Electronics, Computer Material etc.
-Good English writing skills fluental communication capability. (Understanding Korean is plus factor)
-With basic knowledge in fabrication process of advanced packaging, package substrate PCB, good learning in packaging supply chain quality management.
-Basic understanding in packaging SI/PI design thermal/stress simulation, experience in simulation operation by EDA software including Ansys, Cadence Siemens etc.
-With good motivation, good execution, strong responsibility willing to work in a startup company.