Summary:
A Staff Digital Verification Engineer assists in the verification of digital mixed-signal ICs utilizing leading edge technologies with industry standard ASIC tools. Products to be designed/verified may include power management, signal management mixed signal functions.
MPS products include: switching regulators, sensors, motcontrol, display drivers, audio amplifiers power management ICs ffast-growing portable non-portable markets such as notebooks, cell phones, telecom, digital camera, automobile network equipment.
RESPONSIBILITIES:
1. Generation of test plans based on design requirements product datasheets of digital/ mixed- signal IC’s.
2. Close interaction Digital designers Analog Designers to develop System Level Behavioral Models.
3. Digital Verification environments with UVM SystemVerilog.
4. Write Digital Mixed-Signal testcases assertions/checkers.
5. Analyze debug test results, code coverage functional coverage.
6. Document support detailed test plans reviews.
7. Develop Verification IPs standard tests, environments, checkers, etc.
8. Automation scripting.
9. Gate-Level verification.
10. Knowledge & Use of industry standard ASIC tools/flow fdaily work: Digital Simulators, Coverage analysis tools, formal verification tools.
11. Good written/verbal communication skills strong team work/collaboration.
REQUIREMENTS:
1. MS in Electrical Engineering with 5+ years of experience in verification of digital/ Mixed-signal ASIC design.
2. Has the ability to follow instructions/tasks according to design specifications/procedures.
3. Strong knowledge of ASIC development process digital design techniques.
4. Strong knowledge of standard DV languages (SystemVerilog, UVM) in behavioral/RTL coding.
5. Executing tasks that hit project milestone.
6. Knowledge/Experience with the following is a plus:
· Knowledge of power management industry/applications
· I2C, I3C, SPI, USB, PMBUS, OTP/MTP, Buck/Boost
· Scripting automation languages like TCL, Python
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